Xilinx Significantly Reduces Design and Device Costs With Enhanced ISE 5.2i Software
New ISE and ChipScope Pro Software Streamline Design and Verification And Provide Support for the Company's Next Generation, Cost-Optimized 90nm FPGAs
SAN JOSE, Calif., March 3 /PRNewswire/ -- Xilinx Inc. today announced the availability of its latest Integrated Software Environment (ISE) version 5.2i and ChipScope Pro 5.2i. With this latest release, Xilinx continues to reduce system costs by delivering 20% better design performance, 15% better logic utilization, and 50% lower design costs than the nearest competitive offering. Additionally, the new "ASIC-strength" design tools help engineers quickly and easily reach timing closure, thereby reducing overall design costs and time spent in the design flow.
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Today's announcement underscores Xilinx's commitment to deliver software in advance of silicon, allowing customers to begin designing immediately with the company's next generation enhanced MultiGigabit Serial I/O transceivers and cost-optimized 90nm FPGAs. Xilinx's investment in 90nm manufacturing technology will enable the company to drive pricing down to under $25 for a one-million-gate FPGA (approximately 17,000 logic cells)* which represents a savings of 35 to 70 percent compared to any competitive offering. Such a significant reduction in pricing is possible due to the remarkable economies of scale involved with moving to next-generation manufacturing processes at increasingly finer geometries to achieve greater device densities and higher yields.
"We are exploring the possibility of using a smaller device in addition to a slower speed grade to achieve the same functionality and performance due to ISE enhancements. That would cut our device cost by a significant amount of almost 50%," said Mr. M.K. Seo, CFO and vice president of marketing at SysOnChip.
Software Enhancements Focused on Solving Engineering Bottlenecks
To improve design methodology, all configurations of ISE 5.2i include a complete spectrum of free design options that can augment existing programmable design flows and fit customer's specific methodologies. Incremental Design, Modular Design, Macro Builder, and the area planning capabilities included in PACE and ISE Floorplanner reduce design times by up to 50% over traditional design methodologies. In affect, shortening recompile times and delivering team-based design performance advantages.
ChipScope Pro 5.2i real-time verification software is now better integrated with ISE Project Navigator to ease the process of selecting and inserting verification cores and define signal monitor points while bringing real-time debug planning to the overall design flow. The new Virtual I/O core lets designers simulate DIP switch and button settings and the Integrated Bus Analyzer (IBA) core now supports both the IBM CoreConnect Processor Local Bus (PLB) and the on-chip peripheral bus (OPB) on the Virtex-II Pro(TM) FPGAs with embedded PowerPC 405 processors.
Design analysis has been streamlined with new accelerated block RAM verification models and ISE's preserved hierarchical netlist flow, resulting in HDL simulation times up to two times faster than our prior software release. Xilinx and Synopsys have also expanded the LEDA design analysis rule set to over 100 FPGA-specific design rules to help engineers produce high performance FPGA source code.
High-speed design analysis has been further simplified with detailed timing reports that allow for easy identification of high-speed paths, the most complete timing constraints language available in programmable design, and robust "what-if" and filtering capabilities in ISE Timing Analyzer.
Price, evaluation version, platform and availability
The world's leading programmable logic design and verification software, ISE 5.2i supports all leading-edge Xilinx product families including the company's Virtex-II Series FPGAs, Spartan-II Series FPGAs, and CoolRunner-II CPLDs. ChipScope Pro supports Virtex, Virtex-II, and Spartan-II Series FPGAs. Both software packages support Windows 2000 and Windows XP and ISE Foundation and ISE Alliance also support Solaris and Linux. All in-maintenance Xilinx customers will begin receiving ISE upgrades immediately. In-maintenance ChipScope Pro upgrades are slated to begin March 3rd. Pricing for ISE or ChipScope Pro solutions starts at $695 each. The 5.2i version of ISE WebPACK will be available for free download in March 2003. Both ISE and ChipScope Pro are available in free, time-limited, full-featured evaluation versions at http://www.xilinx.com/. For more details on how Xilinx lowers the cost of logic design and verification visit http://www.xilinx.com/ise.
About Xilinx
Xilinx, Inc. is the worldwide leader of programmable logic solutions. Additional information about Xilinx is available at http://www.xilinx.com/.
CONTACT: Jennifer Wright of Xilinx, Inc., +1-408-879-7727, or
jennifer.wright@xilinx.com
Web site: http://www.xilinx.com/
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